Here is what we saw in our welcome bag from GTC 2016 this year:
Please do note, we could not find this model on Quanta’s website (qct.io) nor in a news release, but we suspect as GTC continues we will see more about NVIDIA Pascal and NVLink technology. The NVLink technology is trying to bypass the PCIe 3.0 bus for GPU communication to provide a higher bandwidth and lower latency communications channel, important for HPC and big data applications. It is also a tool NVIDIA is using to make the x86 processor found in today’s systems less important than its GPU technology. Here is a diagram of how NVIDIA may vision a compatible server to be architected in the future.
Here is a bit from NVIDIA’s website on
NVLink is an energy-efficient, high-bandwidth path between the GPU and the CPU at data rates of at least 80 gigabytes per second, or at least 5 times that of the current PCIe Gen3 x16, delivering faster application performance. NVLink is the node integration interconnect for both the Summit and Sierra pre-exascale supercomputers commissioned by the U.S. Department of Energy, enabling NVIDIA GPUs and CPUs such as IBM POWER to access each other’s memory quickly and seamlessly. NVLink will first be available with the next-generation NVIDIA Pascal GPU in 2016.
In addition to speeding CPU-to-GPU communications for systems with an NVLink CPU connection, NVLink can have significant performance benefit for GPU-to-GPU (peer-to-peer) communications as well.
Here are some of NVIDIA’s performance claims for NVLink:
We will also look for this server on the floor and get details as they become available. Hopefully Pascal is coming soon in the form of a shipping product as we cannot wait to get our hands on a few for our new machine learning benchmark effort.
- In the meantime, here are the NVIDIA blogs about NVLink and some additional information on what we can expect from Pascal.
NVIDIA Blog About NVLink
Developer information about NVLink and stacked memory in Pascal