The AMD Hawaii GPU architecture has been unveiled and detailed by today at the GPU ’14 press conference. The AMD Hawaii GPU architecture has been unveiled and detailed by today at the GPU ’14 press conference. The Hawaii GPU architecture is based on the latest GCN 2.0 (Graphics Core Next) architecture and built from ground up to deliver the next era of gaming performance. AMD GPU
Next Generation AMD Hawaii GPU Architecture Unveiled
The AMD Hawaii GPU architecture is fused on AMD’s top tier Radeon R9 290X graphics card which now holds the title of the world’s fastest graphic card. AMD has made some very big changes with the new Hawaii architecture which include the addition of a massive 512-bit bus interface and stream processor count bumped up to 2816 SPs on a 28nm die that has a size of just around 420mm2 which is bigger than the Tahiti fused on the Radeon HD 7970 yet at the same time, 30% smaller than NVIDIA’s GK110 flagship GPU.
There are two cards based on the Hawaii GPU architecture, the AMD Radeon R9 290X which features the Hawaii XT core and the AMD Radeon R9 290 which would launch later featuring the Hawaii Pro core. The specifications for the Hawaii XT part are confirmed but the exact configuration of the Hawaii Pro remains a mystery. Neverthe less, the Hawaii GPU features over 6 billion transistors compared to 4.3 Billion transistors featured in the Radeon HD 7970. This is a phenomenal increase given the price point of the Hawaii GPU which is $599 for the Radeon R9 290X part.
The memory speeds and clock frequencies are not known accurately at the moment but AMD showed a slide which mentioned the bandwidth for Hawaii being rated above 300 GB/s compared to 288 GB/s on the Radeon HD 7970 Tahiti. All combined, the AMD Hawaii GPU pumps out 5 TFlops of compute performance and supports DirectX 11.2 feature set.
|AMD Radeon R9 290X||AMD Radeon R9 290||GeForce GTX 780||GeForce GTX Titan|
|Base Clock||800 MHz||–||863 MHz||837 MHz|
|Turbo Clock||1000 MHz +||–||902 MHz||876 MHz|
|VRAM||4 GB||4 GB||3 GB||6 GB|
|Memory Bus||512-Bit||512-Bit||384-Bit||384 Bit|
|Memory Clock||1125-1250 MHz||–||6 GHz (effective)||6 GHz (effective)|
|Power Configuration||8+6 Pin||6+6 Pin||8+6 Pin||8+6 Pin|
|Launch Date||October 2013||Q4 2013||23rd June May 2013||21st February 2013|